Machine Learning in EDA

By Anmol Salvi INTRODUCTION: Lithography can be defined as the process of transferring patterns of a particular geometric shape in a mask to a thin layer of radiation sensitive material called the resist , thus covering the surface of a semiconductor wafer . Lithography hotspots are places which are susceptible to having fatal pinching (open circuits) or bridging (short circuit) , which occurs due to poor printability of some patterns in a given design layout. In order to avoid such undesirable patterns in a layout , it is mandatory to find hotspots in the early design phase.   As manufacturing conditions evolve , lithography hotspot detection faces many challenges which include:- a)Real hotspots are extremely hard to find during early design stages and also hard to fix in the post layout phase. b)False alarms are detected which result in expensive post processing hotspot removal. c)Full chip physical verification as well as optimization requires an extremely fast turn-arou...

In high level synthesis, acquiring of accurate result estimation becomes difficult in the earlier stage due to complex optimizations in the physical synthesis. Hence, there occurs a trade-off between efficiency, which involves evaluating in the HLS stage itself and accuracy, which points to waiting for post synthesis results by HLS tools. The factor of accuracy can be optimised using Machine Learning tools by learning from real benchmarks. One set of parameters is Estimation of Timing, Resource Usage, and Operation Delay : The main methodology is to train an ML model that takes HLS reports as input and outputs a more accurate implementation report without conducting the time-consuming post-implementation. The workflow can be divided broadly in two steps : Data Processing : Like every ML model, HLS estimation also requires training and testing data. The HLS and implementation reports are usually collected across individual designs by running each design through the complete C-to-...

  Introduction Logic Synthesis is used in order to realize RTL(Register transfer Level) design which is obtained via a hardware description language(HDL). Various types of machine learning techniques are used in order to optimize the complete process. Convolutional Neural Network(CNN) is one of the many methods used and a preliminary one for this purpose. It can be used from logic synthesis, in placement and routing as well as in power deliver network synthesis and IR drop predictions. CNN models are composed of convolutional layers and other basic blocks such as non-linear activation functions and down sample pooling functions. In the logic synthesis and physical design stage, there are many key sub-problems that can benefit from the power of ML models. Let us see how CNN can be implemented in the above mentioned parts for useful optimizations. Logic synthesis: This is an optimization problem with complicated constraints, which requires accurate solutions. Hence, using ML algorith...

By Ishan Aphale Lithography is one of the key steps in semiconductor manufacturing, which turns the designed circuit and layout into real objects. Two popular research directions are lithography hotspot detection and types of mask optimizations. We will focus on mask optimization in this blog. Mask optimization tries to compensate diffraction information loss of design patterns such that the remaining pattern after lithography is very close to the design patterns. Mask optimization plays an important role in VLSI design. Optical proximity correction (OPC) and sub-resolution assist feature (SRAF) insertion are two main methods to increase the printability of the target pattern, and we will be looking into them with the point of view of GANs. We assume basic knowledge of GANs. 1) Optical Proximity Correction With the improvement of semiconductor technology and the scaling down of ICs, traditional OPC techniques are becoming more and more complicated and time-consuming. Yang et al. propos...