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Reinforcement learning for logic synthesis

By Ishan Aphale Logic synthesis is one of the most important steps in modern chip design, and consequently in EDA. Logic synthesis converts the behavioural level description into gate level description, which is one of the most important problems in EDA. Logic synthesis is the implementation of the specific logic functions by generating a combination of gates selected in a given cell library, and optimizes the design for different goals. Being a complicated process, it cannot be solved perfectly and so heuristic algorithms are widely used in this stage, which include lots of ML methods. The emergence of new technologies and slowing down of Moore’s law is putting increasing pressure on the field of EDA. Logic synthesis requires extensive tuning of the synthesis optimization flow where the quality of results (QoR) is dependent on the sequence of optimizations used. Efficient design space exploration is challenging because of the exponential number of possible optimization permutations. T...

High Level Synthesis in VLSI

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With the advancements in the digital electronic technologies and devices that are integrating System-on-chip (SoCs), the design complexity of hardware is also increasing. The designing of hardware systems is thus being optimised with various methodologies and tools that can produce the design output with reliability and efficiency. Levels of abstraction : Hardware design can be implemented through various levels of abstraction, or operational levels. Most commonly utilised levels of abstraction are the gate level, register-transistor level (RTL) and algorithmic level. In software design, as the program complexity and size grew, it became necessary over a period of time to shift from translators assemblers to compilers, that is, move to higher levels of abstraction to simplify the process of design. Similarly, automated hardware synthesis tools were developed due to the translation from higher levels of abstraction for software. Hardware circuits were able to be produced automatically s...

Logic Synthesis in VLSI

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Logic synthesis is basically a process through which a specification of a desired circuit behavior is turned into or translated into a design implementation in terms of logic gates. This translation of a design representation into a circuit comprising of transistors is known as logic synthesis. It is a major part in any circuit designing for implementation of hardware. This synthesis is generally done by using a computer program called as a synthesis tool. The designs specified in hardware description languages are translated using these synthesis tools. The specification of circuit behavior is typically given at register transfer level. Thus, logic synthesis is basically converting a high-level description of design into an optimized gate-level representation. The logic synthesis can be majorly summarized in three main points that are translation, optimization and technology mapping. Translation: In this, the RTL code is translated to a representation which is technology independent. ...

LOGIC SYNTHESIS USING DNN

By Anmol Salvi INTRODUCTION: With advancements and growth in the data science industry , the current applications of DNN(Deep Neural Networks) and various other machine learning techniques are seemingly limitless . Similarly in this manner , DNN also finds it’s application in logic synthesis and can be used to better optimize the entire process and also reduce the time consumed in this process. Before looking into how DNN techniques are applied for logic synthesis applications, first certain key terms need to be discussed. They include:- A)Design Space Complexity of ALS(Approximate Logic Synthesis):- This involves gate replacement by going through each node and performing approximation on all and also calculating the error rate at primary outputs resulting from this approximation. Thus it’s complexity analysis has 2 parts namely:- 1)Node replacement 2)Error propogation B)Deep Neural Networks:-A DNN has an input layer along with a number of hidden layers which are basically ...